Arithmetization Overview

Tables

table name#main cols#aux colstotal width
ProgramTable7316
ProcessorTable391172
OpStackTable4210
RamTable7625
JumpStackTable5211
HashTable6720127
CascadeTable6212
LookupTable4210
U32Table10113
DegreeLowering (-/8/4)0/118/2300/14/380/160/344
Randomizers013
TOTAL149/267/37950/64/88299/459/643

Constraints

The following table captures the state of affairs in terms of constraints before automatic degree lowering. In particular, automatic degree lowering introduces new columns, modifies the constraint set (in a way that is equivalent to what was there before), and lowers the constraints' maximal degree.

Before automatic degree lowering:

table name#initial#consistency#transition#terminalmax degree
ProgramTable641024
ProcessorTable291041119
OpStackTable30504
RamTable701215
JumpStackTable60605
HashTable22454729
CascadeTable21304
LookupTable31413
U32Table11522212
Grand Cross-Table Argument000141
TOTAL79761502319
(# nodes)(534)(624)(6679)(213)

After lowering degree to 8:

table name#initial#consistency#transition#terminal
ProgramTable64102
ProcessorTable29101651
OpStackTable3050
RamTable70121
JumpStackTable6060
HashTable2246492
CascadeTable2130
LookupTable3141
U32Table118242
Grand Cross-Table Argument00014
TOTAL798027823
(# nodes)(534)(635)(6956)(213)

After lowering degree to 4:

table name#initial#consistency#transition#terminal
ProgramTable64102
ProcessorTable31102381
OpStackTable3050
RamTable70131
JumpStackTable6070
HashTable2252842
CascadeTable2130
LookupTable3141
U32Table126342
Grand Cross-Table Argument00014
TOTAL819439823
(# nodes)(538)(676)(7246)(213)

Triton Assembly Constraint Evaluation

Triton VM's recursive verifier needs to evaluate Triton VM's AIR constraints. In order to gauge the runtime cost for this step, the following table provides estimates for that step's contribution to various tables.

TypeProcessorOp StackRAM
static377597022724996
dynamic494567802928895

Opcode Pressure

When changing existing or introducing new instructions, one consideration is: how many other instructions compete for opcodes in the same instruction category? The table below helps answer this question at a glance.

IsU32ShrinksStackHasArgNum Opcodes
nnn12
nny10
nyn11
nyy3
ynn6
yny0
yyn4
yyy0

Maximum number of opcodes per row is 16.